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Chu, Pong P. Embedded SoPC Design with Nios II Processor and Verilog Examples 1. Auflage Mai 2012 112,- Euro 2012. 782 Seiten, Hardcover ISBN 978-1-118-01103-4 - John Wiley & Sons Preis inkl. Mehrwertsteuer zzgl. Versandkosten.	Probekapitel
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Kurzbeschreibung This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers. Aus dem Inhalt Preface Acknowledgments 1 Overview of Embedded System PART I: BASIC DIGITAL CIRCUITS DEVELOPMENT 2 Gate-level Combinational Circuit 3 Overview of FPGA and EDA Software 4 RT-level Combinational Circuit 5 Regular Sequential Circuit 6 FSM 7 FSMD 8 Selected Topics of Verilog PART II: BASIC NOIS II SOFTWARE DEVELOPMENT 9 Nios II Processor Overview 10 NIOS II System Derivation and Low-Level Access 11 Predesigned Nios II I/O Peripherals 12 Predesigned Nios II I/O Drivers and HAL API 13 Interrupt and ISR PART III: CUSTOM I/O PERIPHERAL DEVELOPMENT 14 Custom I/O Peripheral with P/O Cores 15 Avalon Interconnect and SOPC Component 16 SRAM and SDRAM Controllers 17 PS2 Keyboard and Mouse 18 VGA Controller 19 Audio Codec Controller 20 SD Card Controller PART IV: HARDWARE ACCLERATOR CASE STUDIES 21 GCD Accelerator 22 Mandelbrot Set Fractal Accelerator 23 Direct Digital Frequency Synthesis References Topic Index

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